[SOLVED] For kernel module makefile: Use another name for the makefile and using command line parameter

Issue

I have Kernel module sources (for arm) and I would like to compile two different drivers from the same source.

The kernel in compiled with 2 source files and with cross compile.

MODULE_MAME = modulename

SRCS = drv/source.c lib/libsrc.c

OBJS =  $(SRCS:.c=.o)

obj-m += $(MODULE_MAME).o
$(MODULE_MAME)-y = $(OBJS)

KDIR  := /mykermelsources/
PWD   := $(shell pwd)

all:
    $(MAKE) -C $(KDIR)  ARCH=arm M=$(PWD) modules
clean:
    $(MAKE) -C $(KDIR)  ARCH=arm M=$(PWD) clean

In one command, I would like to compile 2 modules.

Two choices:

• Keeping 3 different Makefiles, one main that will call both other makefiles. One problem with this, I cannot make it working. make -f makefilediff or make --makefile=makefilediff give me an error.

Log:

make -C /mykermelsources/  ARCH=arm M=/home/mychardriver/ modules
make[1]: Entering directory '/mykermelsources'
scripts/Makefile.build:44: /home/mychardriver/Makefile: No such file or directory
make[2]: *** No rule to make target '/home/mychardriver//Makefile'.  Stop.
make[1]: *** [_module_/home/mychardriver/] Error 2
make[1]: Leaving directory '/mykermelsources'
make: *** [all] Error 2

• Transmitting command line parameter but it doesn't work. make SIDE=1

Seems the SIDE parameter/variable is never transmitted.

ifeq ($(SIDE),1)
MODULE_MAME = modulename_11
else
MODULE_MAME = modulename_22
endif

SRCS = drv/source.c lib/libsrc.c

OBJS =  $(SRCS:.c=.o)a

obj-m += $(MODULE_MAME).o
$(MODULE_MAME)-y = $(OBJS)

KDIR  := /mykermelsources/
PWD   := $(shell pwd)

all:
    $(MAKE) -C $(KDIR)  ARCH=arm M=$(PWD) SIDE=$(SIDE) modules
clean:
    $(MAKE) -C $(KDIR)  ARCH=arm M=$(PWD) clean

How can I build 2 kernel modules from same multiple source files ?

Solution

Just faced this issue, and this is what I did:

For each moduleX you want to build, write a Kbuild_moduleX with the targets. Example:

obj-$(MODULE) += MODULE.o
MODULE-y := source.o

Then, in your Makefile_moduleX, do:

all:
   cp Kbuild_moduleX Kbuild
   make -C /lib/modules/$(shell uname -r)/build M=$(shell pwd) modules
   rm Kbuild

This works because the kernel scripts will give Kbuild priority over reading Makefile.

To compile, do make -f Makefile_moduleX

Is it pretty? No. Does it work? Yes.

Answered By - hfingler

Answer Checked By - Marilyn (WPSolving Volunteer)